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Bachelor's degree in Electrical, Computer Engineering or equivalent practical experience.
10 years of experience in SoC DFT architecture and design.
10 years of experience in DFT protocols including Scan Compression, MBIST, LBIST, JTAG (IEEE 1149.1), and iJTAG (IEEE 1687).
10 years of experience with industry-standard EDA tools such as Siemens Tessent, Synopsys TestMAX/SMS, or Cadence Modus.
4 years of people management experience developing employees and leading multiple SoC projects from RTL architecture through to post-silicon validation.
Experience in Tcl, Python, or Perl for developing automation flows.

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Bachelor's degree in Electrical, Computer Engineering or equivalent practical experience.
10 years of experience in SoC DFT architecture and design.
10 years of experience in DFT protocols including Scan Compression, MBIST, LBIST, JTAG (IEEE 1149.1), and iJTAG (IEEE 1687).
10 years of experience with industry-standard EDA tools such as Siemens Tessent, Synopsys TestMAX/SMS, or Cadence Modus.
4 years of people management experience developing employees and leading multiple SoC projects from RTL architecture through to post-silicon validation.
Experience in Tcl, Python, or Perl for developing automation flows.

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Bachelor's degree in Electrical, Computer Engineering or equivalent practical experience.
10 years of experience in SoC DFT architecture and design.
10 years of experience in DFT protocols including Scan Compression, MBIST, LBIST, JTAG (IEEE 1149.1), and iJTAG (IEEE 1687).
10 years of experience with industry-standard EDA tools such as Siemens Tessent, Synopsys TestMAX/SMS, or Cadence Modus.
4 years of people management experience developing employees and leading multiple SoC projects from RTL architecture through to post-silicon validation.
Experience in Tcl, Python, or Perl for developing automation flows.

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