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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.
8 years of experience with multiple IPs/SoCs with silicon success.
Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques.

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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.
8 years of experience with multiple IPs/SoCs with silicon success.
Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques.

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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.
8 years of experience with multiple IPs/SoCs with silicon success.
Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques.

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