d:[["$","title","0",{"children":"Silicon SoC DFT Technical Lead, Google Cloud at Google | Software Jobs 4 Me | SoftwareJobs4Me"}],["$","meta","1",{"name":"description","content":"

Bachelor’s degree in Electrical or Computer Engineering, or equivalent practical experience.
8 years of experience in SoC DFT architecture.
8 years of experience in DFT protocols including Scan Compression, MBIST, LBIST, JTAG (IEEE 1149.1), and iJTAG (IEEE 1687).
Experience with industry-standard EDA tools such as Siemens Tessent, Synopsys TestMAX/SMS, or Cadence Modus.
Experience leading multiple SoC projects from RTL architecture through to post-silicon validation and PRQ.
Experience scripting in Tcl, Python, or Perl for developing automation flows.

"}],["$","meta","2",{"name":"application-name","content":"SoftwareJobs4Me"}],["$","link","3",{"rel":"author","href":"https://softwarejobs4me.in"}],["$","meta","4",{"name":"author","content":"SoftwareJobs4Me"}],["$","meta","5",{"name":"keywords","content":"Silicon SoC DFT Technical Lead, Google Cloud,Google,Bengaluru,software jobs,tech jobs,developer jobs,IT jobs,software engineer"}],["$","meta","6",{"name":"creator","content":"SoftwareJobs4Me"}],["$","meta","7",{"name":"publisher","content":"SoftwareJobs4Me"}],["$","meta","8",{"name":"robots","content":"index, follow"}],["$","meta","9",{"name":"googlebot","content":"index, follow, max-video-preview:-1, max-image-preview:large, max-snippet:-1"}],["$","meta","10",{"name":"category","content":"technology"}],["$","link","11",{"rel":"canonical","href":"https://softwarejobs4me.in/jobs/Info/google_129479654250554054"}],["$","meta","12",{"property":"og:title","content":"Silicon SoC DFT Technical Lead, Google Cloud at Google | Software Jobs 4 Me"}],["$","meta","13",{"property":"og:description","content":"

Bachelor’s degree in Electrical or Computer Engineering, or equivalent practical experience.
8 years of experience in SoC DFT architecture.
8 years of experience in DFT protocols including Scan Compression, MBIST, LBIST, JTAG (IEEE 1149.1), and iJTAG (IEEE 1687).
Experience with industry-standard EDA tools such as Siemens Tessent, Synopsys TestMAX/SMS, or Cadence Modus.
Experience leading multiple SoC projects from RTL architecture through to post-silicon validation and PRQ.
Experience scripting in Tcl, Python, or Perl for developing automation flows.

"}],["$","meta","14",{"property":"og:url","content":"https://softwarejobs4me.in/jobs/Info/google_129479654250554054"}],["$","meta","15",{"property":"og:site_name","content":"Software Jobs 4 Me"}],["$","meta","16",{"property":"og:image","content":"https://examsolver-fe.s3.ap-south-1.amazonaws.com/company_logos/google.png"}],["$","meta","17",{"property":"og:image:width","content":"1200"}],["$","meta","18",{"property":"og:image:height","content":"630"}],["$","meta","19",{"property":"og:image:alt","content":"Google Logo"}],["$","meta","20",{"property":"og:type","content":"website"}],["$","meta","21",{"name":"twitter:card","content":"summary_large_image"}],["$","meta","22",{"name":"twitter:title","content":"Silicon SoC DFT Technical Lead, Google Cloud at Google | Software Jobs 4 Me"}],["$","meta","23",{"name":"twitter:description","content":"

Bachelor’s degree in Electrical or Computer Engineering, or equivalent practical experience.
8 years of experience in SoC DFT architecture.
8 years of experience in DFT protocols including Scan Compression, MBIST, LBIST, JTAG (IEEE 1149.1), and iJTAG (IEEE 1687).
Experience with industry-standard EDA tools such as Siemens Tessent, Synopsys TestMAX/SMS, or Cadence Modus.
Experience leading multiple SoC projects from RTL architecture through to post-silicon validation and PRQ.
Experience scripting in Tcl, Python, or Perl for developing automation flows.

"}],"$L10","$L11","$L12","$L13"]