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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
8 years of experience with advanced foundry process nodes, design-technology co-optimization (DTCO), and circuit-level PPA for standard cells, SRAM, and IO/ESD design.
8 years of experience with CMOS, device physics, and circuit design principles, including the first-party IP, third-party IP, and design service vendor landscape.
8 years of experience with circuit characterization and modeling for digital design flows.

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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
8 years of experience with advanced foundry process nodes, design-technology co-optimization (DTCO), and circuit-level PPA for standard cells, SRAM, and IO/ESD design.
8 years of experience with CMOS, device physics, and circuit design principles, including the first-party IP, third-party IP, and design service vendor landscape.
8 years of experience with circuit characterization and modeling for digital design flows.

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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
8 years of experience with advanced foundry process nodes, design-technology co-optimization (DTCO), and circuit-level PPA for standard cells, SRAM, and IO/ESD design.
8 years of experience with CMOS, device physics, and circuit design principles, including the first-party IP, third-party IP, and design service vendor landscape.
8 years of experience with circuit characterization and modeling for digital design flows.

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